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Tutorial [clear filter]
Wednesday, October 17

2:00pm PDT

LLVM backend development by example (RISC-V)
This tutorial steps through how to develop an LLVM backend for a modern RISC target (RISC-V). It will be of interest to anyone who hopes to implement a new backend, modify an existing backend, or simply better understand this part of the LLVM infrastructure. It provides a high level introduction to the MC layer, instruction selection, as well as small selection of represenative implementation challenges. No experience with LLVM backends is required, but a basic level of familiarity with LLVM IR would be useful.

avatar for Alex Bradbury

Alex Bradbury

Co-founder and Director, lowRISC CIC

Wednesday October 17, 2018 2:00pm - 3:00pm PDT
2 - Technical Talk (Rm LL21AB)

3:00pm PDT

Register Allocation: More than Coloring
This tutorial explains the design and implementation of LLVMs register allocation passes. The focus is on the greedy register allocator and the supporting passes like two address handling, copy coalescing and live range splitting.

The tutorial will give tips for debugging register allocator problems and understanding the allocator debugging output. It will also explain how to implement the various callbacks to tune for target specifics.

avatar for Matthias Braun

Matthias Braun

Apple Inc.
I am an LLVM developer working on the code generation part of the compiler, specifically register allocation and scheduling.

Wednesday October 17, 2018 3:00pm - 4:00pm PDT
2 - Technical Talk (Rm LL21AB)

5:30pm PDT

Round Tables
Round table discussions. These are informal discussions among a group of people on a specific topic.

Topics to be discussed during this time slot (but check the flipchart outside the room for most current list):
  • LLVM.org admin synch

Wednesday October 17, 2018 5:30pm - 6:00pm PDT
4 - Round Tables (Rm LL21EF)
Thursday, October 18

11:30am PDT

How to use LLVM to optimize your parallel programs
As Moore's law comes to an end, chipmakers are increasingly relying on both heterogeneous and parallel architectures for performance gains. This has led to a diverse set of software tools and paradigms such as CUDA, OpenMP, Cilk, and many others to best exploit a program’s parallelism for performance gain. Yet, while such tools provide us ways to express parallelism, they come at a large cost to the programmer, requiring in depth knowledge of what to parallelize, how to best map the parallelism to the hardware, and having to rework the code to match the programming model chosen by the software tool.

In this talk, we discuss how to use Tapir, a parallel extension to LLVM, to optimize parallel programs. We will show how one can use Tapir/LLVM to represent programs in attendees’ favorite parallel framework by extending clang, how to perform various optimizations on parallel code, and how to to connect attendees’ parallel language to a variety of parallel backends for execution (PTX, OpenMP Runtime, Cilk Runtime).


William S. Moses

Massachusetts Institute of Technology

Thursday October 18, 2018 11:30am - 12:30pm PDT
2 - Technical Talk (Rm LL21AB)

4:30pm PDT

Updating ORC JIT for Concurrency
LLVM’s ORC JIT APIs have undergone a major redesign over the last year to support compilation of multithreaded code and concurrent compilation within the JIT itself. Internally, ORC’s symbol resolution scheme has been replaced with a system that provides transactional, batch symbol queries. This new scheme both exposes opportunities for parallel compilation within the JIT, and provides a basis for synchronizing interdependent JIT tasks when they reach the JIT linker stage. Alongside this query system, a new “Responsibility” API is introduced to track compilation tasks and enforce graceful termination of the JIT (and JIT’d code) in the event of unrecoverable IPC/RPC failures or other errors. In this talk we will describe the new design, how the API has changed, and the implementation details of the new symbol resolution and responsibility schemes. We will also talk about new developments in the ORC C APIs, and discuss future directions for LLVM’s JIT APIs.


Lang Hames

Apple Inc.

Thursday October 18, 2018 4:30pm - 5:30pm PDT
1 - General Session (Rm LL20ABC)